The invention relates to high-speed CMOS operational amplifiers, and also to circuitry that reduces the amount of delay required for a high-speed CMOS operational amplifier to recover from a saturation condition.
U.S. Pat. Nos. 5,546,045, 4,622,521 and 4,714,896 represent the closest known prior art. U.S. Pat. No. 5,546,045 discloses a rail-to-rail bipolar class AB output stage.
It should be appreciated that until now, there have been very few commercially available high-speed CMOS operational amplifiers. This is because until very recently CMOS transistors that could be readily manufactured using reasonably low-cost CMOS integrated circuit manufacturing processes have had minimum channel length values that are not short enough (i.e., not less than about 0.7 microns) to allow CMOS operational amplifiers manufactured with such CMOS integrated circuit manufacturing processes to compete effectively with high-speed bipolar operational amplifiers manufactured using standard bipolar integrated circuit manufacturing processes. This is because the longer minimum channel lengths of the prior CMOS manufacturing processes result in large gate capacitances of all of the transistors, especially the pull-up transistors and pull-down transistors of the amplifier output stages. The large gate capacitances result in reduced circuit operating speeds compared to what has been achievable using of conventional bipolar integrated circuit manufacturing processes. It is possible for operational amplifiers made with a typical CMOS manufacturing process to have operating speeds comparable to those of conventional bipolar integrated circuit operational amplifiers only if the minimum channel lengths for transistors made using that CMOS manufacturing process are sufficiently small (e.g., less than approximately 0.6 microns for a circuit designed for use with low power supply voltages, or as much as approximately 2.0 microns for a circuit designed for use with high power supply voltages).
In prior art CMOS operational amplifiers, if the output voltage responds to the input signal by increasing to a level close to the positive supply voltage, the input stage of the operational amplifier, which typically includes a differential input stage and a folded cascode stage connected to the gate of the P-channel pull-up transistor, causes the gate of the P-channel pull-up transistor to be pulled down to a level near the ground or negative supply voltage level in order to adequately turn on the P-channel pull-up transistor. Typically, there is a large capacitance coupled to the conductor connected to the gate of the P-channel pull-up transistor. The large capacitance typically includes the gate capacitance of the pull-up transistor and the capacitance of the compensation capacitor of the operational amplifier. Consequently, if the input signal applied to the operational amplifier is rapidly decreased, the input stage of the operational amplifier needs to charge the gate voltage of the P-channel pull-up transistor to a high voltage nearly equal to the positive supply voltage before the P-channel pull-up transistor is turned off. The current supplied by the input stage of the operational amplifier to accomplish the charging up of the large capacitance coupled to and associated with the gate of the P-channel pull-up transistor is small, typically about 100 microamperes. Consequently, there is a substantial delay, referred to herein as an overload recovery delay, before the operational amplifier output voltage responds to the change in the input signal. The foregoing problem for the P-channel pull-up transistor is accompanied by an analogous overload recovery delay problem for the N-channel pull down transistor. The above described overload recovery delay problems have made CMOS operational amplifiers unsuitable for certain applications.
The above described problems for CMOS operational amplifiers also apply directly to CMOS comparators.
For a long time there has been a need for an inexpensive, high-speed integrated circuit operational amplifier with rapid recovery from a saturation or overload condition. This need has not been satisfied by prior CMOS operational amplifiers. Similarly, the need for an inexpensive, high-speed integrated circuit comparator with rapid recovery from a saturation or overload condition is not been satisfied by prior CMOS comparators.